EGGH: SIGGRAPH/Eurographics Workshop on Graphics Hardware: Recent submissions

Now showing items 261-280 of 524

    • Anti-Aliased Line Drawing on a Distributed Cell Store System 

      Moore, A. A.; Ng, C. M.; Bustard, D. W. (The Eurographics Association, 1992)
      One of the principle drawbacks with traditional parallel image composition architectures is the lack of support for transparent images. This paper introduces the Distributed Cell Store System, an architecture based on image ...

    • M-Buffer: A Flexible MISD Architecture for AdvancedGraphics 

      Schneider, Bengt-Olaf; Rossignac, Jarek (The Eurographics Association, 1992)
      Contemporary graphics architectures are based on a hardware-supported geometric pipeline, a rasterizer, a z-buffer and two frame buffers. Additional pixel memory isused for alpha blending and for storing logical information. ...

    • Hardware Challenges for Ray Tracing and Radiosity Algorithms 

      Jansen, Frederik W.; Kok, Arjan J. F.; Verelst, Theo (The Eurographics Association, 1992)
      Computer graphics algorithms and graphics hardware have mainly been developed along two lines: real-time display and realistic display. Real-time display has been achieved by developing dedicated hardware for projective, ...

    • A Parallel-Pipelined Multiprocessor System for the Radiosity Method 

      Shen, L.S.; Deprettere, E.F. (The Eurographics Association, 1992)
      Ray-tracing and radiosity algorithms can produce very realistic images, but they require a lot of computations which make them impractical for scenes of highcomplexity. Several attempts have been made to speed up computations ...

    • Distributed Frame Buffer for Rapid Dynamic Changes to 3D Scenes 

      Coppen, Derek; Slater, Mel; Davison, Allan; Hawes, David (The Eurographics Association, 1992)
      This paper describes a distributed frame buffer architecture, based on the Tiling Algorithm for dynamic modification, and designed to achieve fast display updates inresponse to dynamic transformations of graphical objects. ...

    • Parallelization and Hardware Support for Ray Tracing 

      Groene, Alwin; Renz, Oliver (The Eurographics Association, 1992)
      Even on the latest workstations ray tracing is still a very time-consuming algorithm.This paper makes a thorough analysis of previous attempts to accelerate raytracing by means of parallelization with general purpose ...

    • On the Design of a Real-Time Volume Rendering Engine 

      Smit, J.; Wessels, N.J.; Horst, A. van del'; Bentum, M.J. (The Eurographics Association, 1992)
      An architecture for a Real-Time Volume Rendering Engine is given capable of computing750x750x512 samples from a 3D dataset at a rate of 25 images per second.The RT-VRE uses for this purpose 64 dedicated rendering chips, ...

    • An Extended Volume Visualization System for Arbitrary Parallel Projection 

      Bakalash, R.; Kaufman, A.; Pacheco, R.; Pfister, H. (The Eurographics Association, 1992)
      We present a special architecture for arbitrary parallel projection for visualization ofvolumetric data. Using a ray-casting technique, parallel memory access, and pipelinedprocessing of rays in a composition tree, we can ...

    • Transputer-based Parallel Ray Tracing System Using Demand Data Transfer 

      Kawai, Toshiyuki; Ohnishi, Mitsuhisa; Abeki, Jun-ichi; Ohnishi, Hironobu (The Eurographics Association, 1992)
      This paper describes a parallel ray tracing system MAGG which has 86 transputers and HDTV frame buffers. Our system is based on a screen subdivision algorithm. In this algorithm, each processor essentially requires entire ...

    • A 2nd generation autostereoscopic 3-D display 

      Lang, S.R.; Travis, A.R.L.; Castle, O.M.; Moore, l.R. (The Eurographics Association, 1992)

    • Accelerating Polygon Clipping 

      Schneider, Bengt-Olaf (The Eurographics Association, 1992)
      Polygon clipping is a central part of image generation and image visualization systems.In spite of its algorithmic simplicity it consumes a considerable amount of hardware or software resources. Polygon clipping performance ...

    • Hardware Acceleration of Texture Mapping 

      Dunnett, Graham; Grimsdale, Richard; Lister, Paul; White, Martin (The Eurographics Association, 1992)
      We present a hardware design based around scan-line algorithms. The design can perform colour mapping, environment mapping and produce shading effects which include a specular term. We describe the algorithms which are ...

    • ASICs for a High Performance IVIulti Processor Systemfor Photo-realistic Image Synthesis 

      Vijt, Peter De; Claesen, Luc; Man, Hugo De (The Eurographics Association, 1992)
      A number of ASIC architectures are presented to build a system for fast photorealistic rendering of complex images. Both ray tracing and radiosity algorithms can be used. The system consists of a number of custom and general ...

    • An Architecture for Interactive Raster Graphics 

      Kuijk, A.A.M.; Blake, E.H.; Hagen, P.J.W. ten (The Eurographics Association, 1992)
      A radical reappraisal of the 3-D Interactive raster graphics pipeline has resulted In an experimentalarchitecture for a workstation which is currently being evaluated at the CWI. The principal features of thisarchitecture ...

    • Testing Geometric Primitive Shaders 

      Dunnett, G. J.; White, M.; Lister, P. F.; Grimsdale, R. L. (The Eurographics Association, 1991)
      We present a design and test strategy for Geometric Primitive Shadersintegratedcircuits which perform rasterisation of primitives such as vectors and triangles.The design strategy proceeds through various levels of detail, ...

    • An Architecture for a High Performance Rendering Engine 

      Ackermann, Hans-Josef; Hornung, Christoph (The Eurographics Association, 1991)
      We present an architecture for a high-performance programmable rendering engine.This chip or chip-set will be able to deliver one Gouraud-shaded, z-buffered, texturemodulated and alpha-blended pixel every clock cycle. Focus ...

    • Space Partitioning for Mapping RadiosityComputations onto a Pipelined Parallel Architecture (II) 

      Shen, L.S.; Laarakker, F.A.J.; Deprettere, E. (The Eurographics Association, 1991)
      A new space partitioning technique is elaborated. In part I of the paper [3], we proposed a shell-like structure which is to be superimposed on a uniform grid data structure and is adaptive to the local environment seen ...

    • Accurate Scanconversion of Triangulated Surfaces 

      Rossignac, Jarek R. (The Eurographics Association, 1991)
      Scanconverting a planar face produces depth-values for pixels totally or partly covered by the projection of that face. State-of-the-art hardware-supported scanconversion techniques use sub pixel adjustment and extended ...

    • The Flipping Cube: A Device for Rotating 3D Rasters 

      Yagel, Roni (The Eurographics Association, 1991)
      Driven by the prospect of three-dimensional rasters as a primary vehicle for future 3D graphics and volumetric imaging, this paper introduces an architecture for real-time rendering of high-resolution volumetric images. ...

    • Hardware Outline Character Rasterization 

      Morgan, Marc; Hersch, Roger D. (The Eurographics Association, 1991)
      This paper presents the design and implementation of an application specific integrated circuit (ASIC) for real-time rasterization of characters described by their outline based on vertical scan-conversion and flag fill ...