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dc.contributor.authorWaller, Marcusen_US
dc.contributor.authorDunnett, Grahamen_US
dc.contributor.authorBassett, Mikeen_US
dc.contributor.authorMCCann, Shaunen_US
dc.contributor.authorMakris, Alexen_US
dc.contributor.authorWhite, Martinen_US
dc.contributor.authorLister, Paulen_US
dc.contributor.editorBengt-Olaf Schneider and Andreas Schillingen_US
dc.date.accessioned2014-02-06T14:33:55Z
dc.date.available2014-02-06T14:33:55Z
dc.date.issued1996en_US
dc.identifier.isbn-en_US
dc.identifier.issn-en_US
dc.identifier.urihttp://dx.doi.org/10.2312/EGGH/EGGH96/011-023en_US
dc.description.abstractThis paper describes the Junctionality oj a 3D Graphics Raster Processor called TAYRA. TAYRA consists in the most part oj Graphics Raster Pipeline with five major external interfaces: PCI Master/Target, Depth, Texture, Colour and Video Interfaces.The Graphics Raster Pipeline perform'S' all the major OpenGL style (not necessarily compliant) raster functions: scan conversion; lines, spans, triangles, rectangles, perspective correction o f texture coordinates. mip map jevel selection, and many other texture modes, alpha blending, and other Junctionalities. Further, through TAYRA's fast host to buffer access mechanisms it can do advanced stencilling, multi-pass antialiasing, and other algorithms; all accelerated in hardware with a sustained pixel write speed of 29 MPixels/sec (peak of 33 MPixels/sec). This translates to a peak 25 pixel triangle drawing speed of 890K Triangles/sec, limited bv PCI bus bandwidth.en_US
dc.publisherThe Eurographics Associationen_US
dc.titleTAYRA - A 3D Graphics Raster Processoren_US
dc.description.seriesinformationEurographics Workshop on Graphics Hardwareen_US


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