dc.contributor.author | Ackermann, Hans-Josef | en_US |
dc.contributor.author | Hornung, Christoph | en_US |
dc.contributor.editor | A. Kaufman | en_US |
dc.date.accessioned | 2014-02-06T14:15:19Z | |
dc.date.available | 2014-02-06T14:15:19Z | |
dc.date.issued | 1991 | en_US |
dc.identifier.isbn | - | en_US |
dc.identifier.issn | - | en_US |
dc.identifier.uri | http://dx.doi.org/10.2312/EGGH/EGGH91/157-174 | en_US |
dc.description.abstract | We present an architecture for a high-performance programmable rendering engine.This chip or chip-set will be able to deliver one Gouraud-shaded, z-buffered, texturemodulated and alpha-blended pixel every clock cycle. Focus of the paper is the derivation of the architecture of the pixel processing block from the applied algorithms." | en_US |
dc.publisher | The Eurographics Association | en_US |
dc.title | An Architecture for a High Performance Rendering Engine | en_US |
dc.description.seriesinformation | Eurographics Workshop on Graphics Hardware | en_US |