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dc.contributor.authorShiue, Le-Jengen_US
dc.contributor.authorGoel, Vineeten_US
dc.contributor.authorPeters, Jorgen_US
dc.contributor.editorM. Doggett and W. Heidrich and W. Mark and A. Schillingen_US
dc.date.accessioned2013-10-28T10:01:28Z
dc.date.available2013-10-28T10:01:28Z
dc.date.issued2003en_US
dc.identifier.isbn1-58113-739-1en_US
dc.identifier.issn1727-3471en_US
dc.identifier.urihttp://dx.doi.org/10.2312/EGGH03/015-024en_US
dc.description.abstractWe show how a future graphics processor unit (GPU), enhanced with random read and write to video memory, can represent, refine and adjust complex meshes arising in modeling, simulation and animation. To leverage SIMD parallelism, a general model based on the mesh atlas is developed and a particular implementation without adjacency pointers is proposed in which primal, binary refinement of, possibly mixed, quadrilateral and triangular meshes of arbitrary topological genus, as well as their traversal is supported by user-transparent programmable graphics hardware. Adjustment, such as subdivision smoothing rules, is realized as user-programmable mesh shader routines. Attributes are generic and can be defined in the graphics application by binding them to one of several general addressing mechanisms.en_US
dc.publisherThe Eurographics Associationen_US
dc.titleMesh Mutation in Programmable Graphics Hardwareen_US
dc.description.seriesinformationGraphics Hardwareen_US


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