ALITE - AN ENGINEERING TOOL FOR AUTOMATIC CHIP DESIGN
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1982Pay-Per-View via TIB Hannover:
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To meet the variety of layout challenges raised by developing VLSI technology, a new Autolayout system has been developed. This flexible tool provides automated or interactive layout of both 'mass-production' and custom logic IC's for a variety of MOS technologies. The layout process accommodates 2 or 3 routing layers, signals of different widths and produces power and ground connections entirely on a single layer. Additionally the system allows its algorithms to be controlled and directed so that it can be highly tuned to a particular application. The system is integrated with other Integrated Circuit Design aids such as GAELIC, TARTAN and CHECK.
BibTeX
@inproceedings {10.2312:eg.19821023,
booktitle = {Eurographics Conference Proceedings},
editor = {D. S. Greenaway and E. A. Warman},
title = {{ALITE - AN ENGINEERING TOOL FOR AUTOMATIC CHIP DESIGN}},
author = {Anson, R. C. and Tweedly, A. G.},
year = {1982},
publisher = {The Eurographics Association},
ISSN = {1017-4656},
DOI = {10.2312/eg.19821023}
}
booktitle = {Eurographics Conference Proceedings},
editor = {D. S. Greenaway and E. A. Warman},
title = {{ALITE - AN ENGINEERING TOOL FOR AUTOMATIC CHIP DESIGN}},
author = {Anson, R. C. and Tweedly, A. G.},
year = {1982},
publisher = {The Eurographics Association},
ISSN = {1017-4656},
DOI = {10.2312/eg.19821023}
}