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dc.contributor.authorSelzer, Haralden_US
dc.contributor.editorA. Kaufmanen_US
dc.date.accessioned2014-02-06T14:15:17Z
dc.date.available2014-02-06T14:15:17Z
dc.date.issued1991en_US
dc.identifier.isbn-en_US
dc.identifier.issn-en_US
dc.identifier.urihttp://dx.doi.org/10.2312/EGGH/EGGH91/037-053en_US
dc.description.abstractInteractive 3D graphics applications require significant arithmetic processing to meet the ever-inreasing desire for higher image complexity and higher resolution in displayed images. This paper describes a graphics processor architecture with a high degree of parallelismconnected to a distributed frame buffer. The architecture can be configured with an arbitrary number of identical, high level programmable processors operating in parallel.Within the architecture an automatic load balancing mechanism is presented whichdistributes the processing load between geometry and rendering section. After the unique features of the architecture are described the load balancing mechanismis analyzed and the increase of performance is demonstrated."en_US
dc.publisherThe Eurographics Associationen_US
dc.titleDynamic Load Balancing within a High PerformanceGraphics Systemen_US
dc.description.seriesinformationEurographics Workshop on Graphics Hardwareen_US


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