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dc.contributor.authorSchmittler, Jörgen_US
dc.contributor.authorWald, Ingoen_US
dc.contributor.authorSlusallek, Philippen_US
dc.contributor.editorThomas Ertl and Wolfgang Heidrich and Michael Doggetten_US
dc.date.accessioned2013-10-28T10:00:19Z
dc.date.available2013-10-28T10:00:19Z
dc.date.issued2002en_US
dc.identifier.isbn1-58113-580-1en_US
dc.identifier.issn1727-3471en_US
dc.identifier.urihttp://dx.doi.org/10.2312/EGGH/EGGH02/027-036en_US
dc.description.abstractThe ray tracing algorithm is well-known for its ability to generate high-quality images and its flexibility to support advanced rendering and lighting effects. Interactive ray tracing has been shown to work well on clusters of PCs and supercomputers but direct hardware support for ray tracing has been difficult to implement. In this paper, we present a new, scalable, modular, and highly efficient hardware architecture for real-time ray tracing. It achieves high performance with extremely low memory bandwidth requirements by efficiently tracing bundles of rays. The architecture is easily configurable to support a variety of workloads. For OpenGL-like scenes our architecture offers performance comparable to state-of-the-art rasterization chips. In addition, it supports all the usual ray tracing features including exact shadows, reflections, and refraction and is capable of efficiently handling complex scenes with millions of triangles. The architecture and its performance in different configurations is analyzed based on cycle-accurate simulations.en_US
dc.publisherThe Eurographics Associationen_US
dc.subjectI.3.1 [Computer Graphics]en_US
dc.subjectHardware Architectureen_US
dc.subjectI.3.7 [Computer Graphics]en_US
dc.subjectThree Dimensional Graphics and Realism B.5.1 [Hardware Design]en_US
dc.subjectRegisteren_US
dc.subjectTransferen_US
dc.subjectLevel Implementationen_US
dc.titleSaarCOR - A Hardware Architecture for Ray Tracingen_US
dc.description.seriesinformationSIGGRAPH/Eurographics Workshop on Graphics Hardwareen_US


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