dc.contributor.author | Lee, Jin-Aeon | en_US |
dc.contributor.author | Kim, Lee-Sup | en_US |
dc.contributor.editor | I. Buck and G. Humphreys and P. Hanrahan | en_US |
dc.date.accessioned | 2013-10-28T09:57:04Z | |
dc.date.available | 2013-10-28T09:57:04Z | |
dc.date.issued | 2000 | en_US |
dc.identifier.isbn | 1-58113-257-3 | en_US |
dc.identifier.issn | 1727-3471 | en_US |
dc.identifier.uri | http://dx.doi.org/10.2312/EGGH/EGGH00/067-076 | en_US |
dc.description.abstract | This paper describes a modified A-buffer algorithm and its hardware architecture for single-pass full-screen antialiasing. For storage and management of fragments, a dynamic memory management scheme, which can be efficiently implemented by hardware is introduced. In the fragment resolving stage, a subpixel color-blending scheme that resolves subpixels simultaneously is used to correctly blend transparencies and resolve intersections of polygons in a pixel. A rasterization processor architecture, which can process multiple pixels simultaneously, is also presented. | en_US |
dc.publisher | The Eurographics Association | en_US |
dc.subject | I.3.3 [Computer Graphics] | en_US |
dc.subject | Picture/Image Generation Antialiasing | en_US |
dc.subject | I.3.1 [Computer Graphics] | en_US |
dc.subject | Hardware Architecture Graphics Processors | en_US |
dc.title | Single-Pass Full-Screen Hardware Accelerated Antialiasing | en_US |
dc.description.seriesinformation | SIGGRAPH/Eurographics Workshop on Graphics Hardware | en_US |