Browsing EGGH01: SIGGRAPH/Eurographics Workshop on Graphics Hardware 2001 by Subject "Hardware Architecture"

Now showing items 1-5 of 5

    • Compiling to a VLIW Fragment Pipeline 

      Mark, William R.; Proudfoot, Kekoa (The Eurographics Association, 2001)
      The latest generation of graphics hardware supports fully programmable vertex and pixel/fragment operations, but programming this hardware at a low level is difficult and time consuming. To address this problem, we have ...

    • The F-Buffer: A Rasterization-Order FIFO Buffer for Multi-Pass Rendering 

      Mark, William R.; Proudfoot, Kekoa (The Eurographics Association, 2001)
      Multi-pass rendering is a common method of virtualizing graphics hardware to overcome limited resources. Most current multi-pass rendering techniques use the RGBA framebuffer to store intermediate results between each pass. ...

    • Quasi-Linear Depth Buffers With Variable Resolution 

      Lapidous, Eugene; Jiao, Guofang; Zhang, Jianbo; Wilson, Timothy (The Eurographics Association, 2001)
      In this paper we present new class of variable-resolution depth buffers, providing a flexible trade-off between depth precision in the distant areas of the view volume and performance. These depth buffers can be implemented ...

    • Real-Time Bump Map Synthesis 

      Kautz, Jan; Heidrich, Wolfgang; Seidel, Hans-Peter (The Eurographics Association, 2001)
      In this paper we present a method that automatically synthesizes bump maps at arbitrary levels of detail in real-time. The only input data we require is a normal density function; the bump map is generated according to ...

    • Watertight Tessellation using Forward Differencing 

      Moreton, Henry (The Eurographics Association, 2001)
      In this paper we describe an algorithm and hardware for the tessellation of polynomial surfaces. While conventional forward difference-based tessellation is subject to round off error and cracking, our algorithm produces ...