dc.contributor.author | Doggett, Michael | en_US |
dc.contributor.author | Meißner, Michael | en_US |
dc.contributor.author | Kanust, Urs | en_US |
dc.contributor.editor | A. Kaufmann and W. Strasser and S. Molnar and B.- O. Schneider | en_US |
dc.date.accessioned | 2014-02-06T15:04:34Z | |
dc.date.available | 2014-02-06T15:04:34Z | |
dc.date.issued | 1999 | en_US |
dc.identifier.isbn | 1-58113-170-4 | en_US |
dc.identifier.issn | 1727-3471 | en_US |
dc.identifier.uri | http://dx.doi.org/10.2312/EGGH/EGGH99/007-014 | en_US |
dc.description.abstract | In this paper we present a low-cost memory architecture running at 100 MHz which is suited for any PCI-based volume rendering accelerator using the ray-casting approach. Current SDRAM technology, parallel access to all voxels required for trilinear interpolation, a cubic addressing scheme, and a buffering mechanism accommodating memory latency are applied to achieve high frame-rates. A total of four off-the-shelf standard DIMM modules are required enabling up to 9 Hz (averaged over a representative set of views) for datasets of 2563 voxels, using early ray termination as the only algorithmic optimization. The presented memory architecture is a good balance of cost versus feasibility on a standard PC1 card - accepting data replication - and will be used for the VIZARD II ray casting accelerator. | en_US |
dc.publisher | The Eurographics Association | en_US |
dc.subject | B.3.2 [Memory Structures] | en_US |
dc.subject | Design Style | en_US |
dc.subject | Associative andcache Memories | en_US |
dc.subject | 1.3.1 [Computer Graphics] | en_US |
dc.subject | Hardware Architecture | en_US |
dc.subject | Graphics Processors | en_US |
dc.subject | 1.3.3 [Computer Graphics] | en_US |
dc.subject | Picture/ Image Generation | en_US |
dc.subject | Display Algorithms | en_US |
dc.title | A Low-Cost Memory Architecture For PCI-Based Interactive Ray Casting | en_US |
dc.description.seriesinformation | SIGGRAPH/Eurographics Workshop on Graphics Hardware | en_US |