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dc.contributor.authorWei, Binen_US
dc.contributor.authorClark, Douglas W.en_US
dc.contributor.authorFelten, Edward W.en_US
dc.contributor.authorLi, Kaien_US
dc.contributor.editorS. N. Spenceren_US
dc.date.accessioned2014-02-06T15:01:27Z
dc.date.available2014-02-06T15:01:27Z
dc.date.issued1998en_US
dc.identifier.isbn0-89791-097-Xen_US
dc.identifier.issn1727-3471en_US
dc.identifier.urihttp://dx.doi.org/10.2312/EGGH/EGGH98/087-096en_US
dc.description.abstractA multiple-port, distributed frame buffer has been recently proposed to support parallel rendering on multicomputers. This paper describes an implementation of such a distributed frame buffer for the Intel Paragon routing network, and reports its performance results. We have conducted several experiments with the system we have developed. Our results indicate that placing a multipleport, distributed frame buffer directly on the host internal routing network can provide high throughput to eliminate the bottleneck of merging a final image from multiple processors to a frame buffer. This architectural approach can also effectively support image composition for sort-last. The synchronization algorithm we have developed requires only one-way communication and minimizes receive overhead for message passing to the frame buffer.en_US
dc.publisherThe Eurographics Associationen_US
dc.subjectB.4.3 [Input/Output]en_US
dc.subjectSubsystemsen_US
dc.subjectParallel I/Oen_US
dc.subject1.3.1 [Computer Graphics]en_US
dc.subjectHardware Architectureen_US
dc.subjectParallel Processingen_US
dc.subjectC.4 [Performance of Systems]en_US
dc.subjectDesign Studies.en_US
dc.titlePerformance Issues of a Distributed Frame Buffer on a Multicomputeren_US
dc.description.seriesinformationSIGGRAPH/Eurographics Workshop on Graphics Hardwareen_US


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