| dc.contributor.author | Molla, RP | en_US |
| dc.contributor.author | Quiros, R | en_US |
| dc.contributor.author | Lluch, J | en_US |
| dc.contributor.author | Vivo, R | en_US |
| dc.contributor.editor | P. F. Lister and R. L. Grimsdale | en_US |
| dc.date.accessioned | 2014-02-06T14:24:16Z | |
| dc.date.available | 2014-02-06T14:24:16Z | |
| dc.date.issued | 1993 | en_US |
| dc.identifier.isbn | - | en_US |
| dc.identifier.issn | - | en_US |
| dc.identifier.uri | http://dx.doi.org/10.2312/EGGH/EGGH93/015-023 | en_US |
| dc.description.abstract | Two main serial algorithms to scan convert straight lines have beenproposed: Bresenham and Digital Differential AnalyzeLThe Bresenham algorithm has became a standard because of integer arithmetic. Many theoretical solutions have been proposed to parallelize Bresenham algorithm but its implementation is difficult. So most parallelizations take advantage of repeated patterns, massive parallel computers and so on. Sequential Digital Differential Analyzer shows better peformance than Bresenham if fixed pointarithmetic is used. This algorithm can be pipe lined and parallelized. It is easily hardware implemented and scalable. Hardware cost is linear with speedup. Utilization is nearly 100% and hardware waste is low. | en_US |
| dc.publisher | The Eurographics Association | en_US |
| dc.subject | Digital Differential Analyzer | en_US |
| dc.subject | Line drawing | en_US |
| dc.subject | Fixed PointArithmetic | en_US |
| dc.subject | paralIelization | en_US |
| dc.subject | graphic coprocessors. | en_US |
| dc.title | Parallel Fixed Point Digital Differential Analyzer | en_US |
| dc.description.seriesinformation | Eurographics Workshop on Graphics Hardware | en_US |
