| dc.contributor.author | Oldfield, J.V. | en_US |
| dc.contributor.author | Williams, R.D. | en_US |
| dc.contributor.author | Wiseman, N.E. | en_US |
| dc.contributor.author | Brûlé, M.R. | en_US |
| dc.contributor.editor | A. A. M.Kuijk | en_US |
| dc.date.accessioned | 2014-02-06T14:04:59Z | |
| dc.date.available | 2014-02-06T14:04:59Z | |
| dc.date.issued | 1988 | en_US |
| dc.identifier.isbn | 3-540-53488-1 | en_US |
| dc.identifier.issn | 1727-3471 | en_US |
| dc.identifier.uri | http://dx.doi.org/10.2312/EGGH/EGGH88/067-084 | en_US |
| dc.description.abstract | Quadtrees are attractive for storing and processing mages with area coherence, but performance has been limited by software overheads. A Content-Addressable Memory (CAM) with ternary storage allows single-cycle searches by pixel coordinate, quadrant or rectangle. To use thiS feature effectively the authors have reviewed a range of quadtree processing functions relevant to computer graphics and Image processing, and some new algorithms have been discovere. The proposed VLSI chip has microcoded logic on each row, as well as its CAM cells. This architecture has been simulated in fine detail with the aid of the Connection Machine as well as by much slower, conventional computers. The combination of quadtrees and CAMs offers significant improvement in performance for display systems and image processing. | en_US |
| dc.publisher | The Eurographics Association | en_US |
| dc.subject | Algorithms | en_US |
| dc.subject | Content | en_US |
| dc.subject | addressable memories. | en_US |
| dc.title | Content-Addressable Memories for Quadtree-8ased Images | en_US |
| dc.description.seriesinformation | Eurographics workshop on Graphics Hardware | en_US |
