dc.contributor.author | Bischoff, Stephan | en_US |
dc.contributor.author | Kobbelt, Leif P. | en_US |
dc.contributor.author | Seidel, Hans-Peter | en_US |
dc.contributor.editor | I. Buck and G. Humphreys and P. Hanrahan | en_US |
dc.date.accessioned | 2013-10-28T09:57:03Z | |
dc.date.available | 2013-10-28T09:57:03Z | |
dc.date.issued | 2000 | en_US |
dc.identifier.isbn | 1-58113-257-3 | en_US |
dc.identifier.issn | 1727-3471 | en_US |
dc.identifier.uri | http://dx.doi.org/10.2312/EGGH/EGGH00/041-050 | en_US |
dc.description.abstract | We present a novel algorithm to evaluate and render Loop subdivision surfaces. The algorithm exploits the fact that Loop subdivision surfaces are piecewise polynomial and uses the forward difference technique for efficiently computing uniform samples on the limit surface. The main advantage of our algorithm is that it only requires a small and constant amount of memory that does not depend on the subdivision depth. The simple structure of the algorithm enables a scalable degree of hardware implementation. By low-level parallelization of the computations, we can reduce the critical computation costs to a theoretical minimum of about one float[3]- operation per triangle. | en_US |
dc.publisher | The Eurographics Association | en_US |
dc.subject | I.3.1 [Computer Graphics] | en_US |
dc.subject | Hardware Architecture Graphics processors | en_US |
dc.subject | I.3.3 [Computer Graphics] | en_US |
dc.subject | Picture/ Image Generation Display algorithms | en_US |
dc.title | Towards Hardware Implementation Of Loop Subdivision | en_US |
dc.description.seriesinformation | SIGGRAPH/Eurographics Workshop on Graphics Hardware | en_US |