Browsing EGGH: SIGGRAPH/Eurographics Workshop on Graphics Hardware by Subject "1.3.1 [Computer Graphics]"

Now showing items 1-20 of 25

    • Adaptive Hierarchical Visibility in a Tiled Architecture 

      Xie, Feng; Shantz, Michael (The Eurographics Association, 1999)
      This paper describes a method for occlusion culling in a tiled 3D graphics hardware architecture. Adaptive hierarchical visibility (AHV) is a simplified method for occlusion culling that is integrated into a tiled architecture ...

    • Antialiased Parameterized Solid Texturing Simplified for Consumer- Level Hardware Implementation 

      Hart, John C.; Carr, Nate; Karneya, Masaki; Tibbitts, Stephen A.; Coleman, Terrance J. (The Eurographics Association, 1999)
      Procedural solid texturing was introduced fourteen years ago, but has yet to find its way into consumer level graphics hardware for teal-time operation. To this end, a new model is introduced that yields a parameterized ...

    • Codesign Of Graphics Hardware Accelerators 

      Ewins, Jon P.; L.Watten, Phil; White, Martin; McNeill, Michael D. J.; Lister, Paul F. (The Eurographics Association, 1997)
      The design of a hardware architecture for a computer graphics pipeline requires a thorough understanding of the algorithms involved at each stage, and the implications these algorithms have on the organisation of the ...

    • Design of a Fast Voxel Processor for Parallel Volume Visualization 

      Lichtennann, Jan (The Eurographics Association, 1995)
      The basics of a parallel real-time volume visualization architecture are introduced. Volume data is divided into subcubes that are dis­ tributed among multiple image processors and stored in their pri­ vate voxel memories. ...

    • Hybrid Volume and Polygon Rendering with Cube Hardware 

      Kreeger, Kevin; Kaufman, Arie (The Eurographics Association, 1999)
      We present two methods which connect today s polygon graphics hardware accelerators to Cube-5 volume rendering hardware, the successor to Cube4 The proposed methods allow mixing of both opaque and translucent polygons with ...

    • IMEM: An Intelligent Memory for Bump- and Reflection-Mapping 

      Kugler, Anders (The Eurographics Association, 1998)
      Data path simplification in the context of reflection- and bumpmapping hardware opens new solutions in the design of rendering and shading circuits. We are proposing a novel approach to rendering bump- and reflection-mapped ...

    • A Low-Cost Memory Architecture For PCI-Based Interactive Ray Casting 

      Doggett, Michael; Meißner, Michael; Kanust, Urs (The Eurographics Association, 1999)
      In this paper we present a low-cost memory architecture running at 100 MHz which is suited for any PCI-based volume rendering accelerator using the ray-casting approach. Current SDRAM technology, parallel access to all ...

    • Memory Access Patterns of Occlusion-Compatible 3D Image Warping 

      Murk, William R.; Bishop, Gary (The Eurographics Association, 1997)
      McMillan and Bishop s 3D image warp can be efficiently implemented by exploiting the coherency of its memory accesses. We analyze this coherency, and present algorithms that take advantage of it. These algorithms traverse ...

    • Multiresolution Rendering With Displacement Mapping 

      Gumhold, Stefan; Hüttner, Tobias (The Eurographics Association, 1999)
      In this paper, we present for the first time an approach for hardware accelerated displacement mapping. The displaced surface is generated from a 2D displacement map by remeshing a coarse triangle mesh according to the ...

    • Neon: A Single-Chip 3D Workstation Graphics Accelerator 

      McCormack, Joel; McNamara, Robert; Gianos, Christopher; Seiler, Larry; Jouppi, Norman P.; Correll, Ken (The Eurographics Association, 1998)
      High-performance 3D graphics accelerators traditionally require multiple chips on multiple boards, including geometry, rasterizing, pixel processing, and texture mapping chips. These designs are often scalable: they can ...

    • Optimal Depth Buffer for Low-Cost Graphics Hardware 

      Lapidous, Eugene; Jiao, Guofang (The Eurographics Association, 1999)
      3D applications using hardware depth buffers for visibility testing are confronted with multiple choices of buffer types, sizes and formats. Some of the options are not exposed through 3D API or may be used by the driver ...

    • Parallel Texture Caching 

      lgehy, Homan; Eldridge, Matthew; Hanrahan, Pat (The Eurographics Association, 1999)
      The creation of high-quality images requires new functionality and higher performance in real-time graphics architectures. In terms of functionality, texture mapping has become an integral component of graphics systems, ...

    • PAVLOV: A Programmable Architecture for Volume Processing 

      Kreeger, Kevin; Kaufman, Arie (The Eurographics Association, 1998)
      We present a parallel 2D mesh connected architecture with SIMD processing elements. The design allows for real-time volume rendering as well as interactive 30 segmentation and 1D feature extraction. This is possible because ...

    • Performance Issues of a Distributed Frame Buffer on a Multicomputer 

      Wei, Bin; Clark, Douglas W.; Felten, Edward W.; Li, Kai (The Eurographics Association, 1998)
      A multiple-port, distributed frame buffer has been recently proposed to support parallel rendering on multicomputers. This paper describes an implementation of such a distributed frame buffer for the Intel Paragon routing ...

    • PixelFlow: The Realization 

      Eyles, John; Molnar, Steven; Poulton, John; Greer, Trey; Lastra, Anselmo; England, Nick; Westover, Lee (The Eurographics Association, 1997)
      PixelFlow is an architecture for high-speed, highly realistic image generation, based on the techniques of object-parallelism and image composition. Its initial architecture was described in [MOLN92]. After development by ...

    • Prefetching in a Texture Cache Architecture 

      lgehy, Homan; Eldridge, Matthew; Proudfoot, Kekoa (The Eurographics Association, 1998)
      Texture mapping has become so ubiquitous in real-time graphics hardware that many systems are able to perform filtered texturing without any penalty in fill rate. The computation rates available in hardware have been ...

    • Realizing OpenGL: Two Implementations of One Architecture 

      Kilgard, Mark J. (The Eurographics Association, 1997)
      The OpenGL Graphics System provides a well-specified, widely accepted dataflow for 3D graphics and imaging. OpenGL is an architecture; an OpenGL-capable computer is a hardware manifestation or implementaion of that ...

    • Simple Models of the Impact of Overlap in Bucket Rendering 

      Chen, Milton; Stall, Gordon; Igehy, Homan; Proudfoot, Kekoa; Hanrahan, Pat (The Eurographics Association, 1998)
      Bucket rendering is a technique in which the framebuffer is subdivided into coherent regions that are rendered independently. The primary benelits of this technique are the decrease in the size of the working set of ...

    • Texture Shaders 

      McCool, Michael D.; Heidrich, Wolfgang (The Eurographics Association, 1999)
      Extensions to the texture-mapping support of the abstract graphics hardware pipeline and the OpenGL API are proposed to better support programmable shading, with a unified interface, on a variety of future graphics accelerator ...

    • Towards Real-Time Photorealistic Rendering: Challenges and Solutions 

      Schilling, Andreas (The Eurographics Association, 1997)
      A growing number of real-time applications need graphics with photorealistic quality, especially in the field of training (virtual operation, driving and flightsimulation), but also in the areas of design or ergonomic ...